1. Field of the Invention
The present invention relates to electrically programmable antifuse devices and methods of manufacture thereof. More particularly, the present invention relates to a an electrically programmable antifuse employing an antifuse aperture having a staircase profile and to methods for manufacturing such an antifuse.
2. The Prior Art
Integrated circuits which can be configured or programmed by the user for a specific application are becoming increasingly popular. These circuits may take numerous forms, such as programmable read only memory (PROM) devices and field programmable gate array (FPGA) devices. These devices may be electrically programmed by a user by either selectively breaking or creating a series of programmable links. Programmable links are electrical interconnects in the packaged integrated circuit which are broken or created by the user programming selected electronic nodes. Such programming is undertaken in order to activate or deactivate, respectively, selected electronic nodes such that the programmed device may perform a desired function.
Antifuse links are used extensively in user-programmable circuits and are well known. Antifuse links consist of typically two conductor and/or semiconductor electrodes separated by a layer of dielectric or other antifuse material. An antifuse link is an open circuit in its unprogrammed state. The programming mechanism for an antifuse creates a short circuit or relatively low resistance link between a transistor or other electronic node and the lattice network in the typical user-programmable circuits. During programming, the antifuse material between the electrodes is broken down by a current developed from a predetermined programming voltage applied to the electrodes of the selected antifuse links. A conductive filament is thereby formed which electrically connects the electrodes to create a short circuit or relatively low resistance path.
Antifuse elements such as those disclosed in U.S. Pat. No. 4,823,181 and U.S. Pat. No. 5,057,451 are extremely useful in user-programmable devices due to their extremely small size. All that is required in forming an effective antifuse is that the antifuse material layer between the two electrodes, when disrupted by a high electric field, will break down to produce a conductive filament. The size of the conductive filament is generally a function of the programming voltage pulse and the composition of the dielectric structure of the antifuse.
In any circuit containing a plurality of antifuse elements, it is crucial to minimize the capacitance of the unprogrammed antifuses. Each unprogrammed antifuse comprises two electrodes separated by a dielectric material, i.e., a capacitor. Therefore a plurality of unprogrammed antifuses on a single line of a matrix will act as a plurality of capacitors connected in parallel, wherein the capacitance of the line will be the sum of the capacitance of all of the unprogrammed antifuses. Accordingly, the larger the capacitance, the slower the data signals will pass down the line, thus greatly impairing device speed. It is therefore essential to minimize the capacitance of each antifuse element in order to insure proper device operation. This is usually accomplished by separating the electrodes by a relatively thick interlayer dielectric (ILD).
Additionally, in order to insure reliable device operation over life, the antifuse must be manufactured in such a way so as to emulate a high impedance (open circuit) while unprogrammed and maintain a low impedance (short circuit) after programming. This requires minimizing the leakage currents that flow in unprogrammed (open) antifuses between the two electrodes. Alternatively in the programmed state, the antifuse and resultant conductive filament must offer high electromigration immunity thereby maintaining the low resistance conductive path through the programmed antifuse for the operating life of the device.
Finally, the antifuse links must be manufactured so as to remain reliable at both the high programming voltages on the order of 10 to 18 volts (and resultant current flows) while maintaining the steady state reliability at normal operating voltages of 5 volts. The steady state reliability requirement necessarily requires a small programming voltage distribution range over all antifuse elements in the given integrated circuit device.
Antifuses may be fabricated using standard semiconductor processing techniques. The lower conductor is covered with an insulating material, typically a silicon dioxide layer, into which a window is etched in the region where it is desired to form the antifuse. This window is typically formed with vertical or slightly tapered edges at the top of the cell opening. The antifuse dielectric is then formed in the window region and is covered by one or more of conductive layers which will serve as the upper electrode.
The actual vertical conductive area of a programmed antifuse is relatively small. In order to maximize circuit performance, it is desirable to make the antifuse dielectric window area as small as possible to minimize the capacitance contributed by the antifuses which are to remain unprogrammed in the finished circuit.
The desire to minimize the area of the dielectric window is counterbalanced, however, by the inherent limitations in semiconductor processing techniques in providing uniform deposits in subsequent dielectric and top electrode formation of the antifuse. At some point, the dielectric window area becomes so small that subsequent deposits cannot easily fill the small opening and a shallowing effect will result. The resultant deposition will be subject to overhang at the top edge of the cell opening and cusping at the bottom of the cell. This shallowing effect will necessarily result in thinning of the top electrode in the cell opening requiring a greater barrier requirement for the top electrode to minimize leakage currents or a resultant poorer leakage current performance. Additionally, the nonuniform depositions of the dielectric and top electrode will result in poorer electromigration immunity, lower breakdown voltages in the dielectric, and wider breakdown voltage distribution throughout the antifuse lines.
Current design techniques have either suffered with these performance parameters or opened up the tolerances on the cell opening to minimize this effect, and necessarily increased the overall capacitance of the device thus slowing performance.
In order to overcome the disadvantages of the prior art antifuses while maintaining the low capacitance of the small cell opening devices, it is the object of the present invention to provide an electrically programmable antifuse including a staircase profile cell opening that provides for more uniform coverage of subsequent depositions in the antifuse production process.
A further object of the invention is to provide a method for fabricating the staircase profile cell opening antifuse of the present invention.